OPTIMIZATION OF SILICON BIPOLAR-TRANSISTORS FOR HIGH-CURRENT GAIN AT LOW-TEMPERATURES

被引:40
作者
WOO, JCS [1 ]
PLUMMER, JD [1 ]
机构
[1] STANFORD UNIV,INTEGRATED CIRCUITS LAB,STANFORD,CA 94305
关键词
D O I
10.1109/16.2553
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:1311 / 1321
页数:11
相关论文
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