GaAs FET's gate current behavior and its effects on RF performance and reliability in SSPA's

被引:6
作者
Constantin, N
Ghannouchi, FM
机构
[1] Electrical and Computer Engineering Department, École Polytechnique de Montréal, Succ. Centre-Ville, Montréal, Quebec, Canada
基金
加拿大自然科学与工程研究理事会;
关键词
D O I
10.1109/22.475656
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a detailed experimental investigation of gate current limitation effects on power GaAs FET's rf performances. This limitation is accomplished entirely by dynamic compensation of the gate bias voltage. Effects of this current limitation on power added efficiency and output power performances have been examined through an extensive experimental investigation using active second-harmonic loading over the entire Smith chart, Comprehensive results are given and enable the determination of the optimal gate resistor value needed in the de path for gate current limitation, Thermal runaway problem is also considered when selecting the gate resistor. The current limitation mechanism is analyzed in the case where the gate voltage is controlled in a feedback loop for linearization purposes. Measurements performed on a feedback linearized amplifier are presented and show the behavior of the gate current and its effects on intermodulation product levels.
引用
收藏
页码:2918 / 2925
页数:8
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