FREQUENCY-SELECTIVE INTEGRATED CIRCUITS USING PHASE-LOCK TECHNIQUES

被引:10
作者
GREBENE, AB
CAMENZIN.HR
机构
[1] Signetics Corporation, Sunnyvale, Calif.
关键词
D O I
10.1109/JSSC.1969.1049999
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A system-oriented approach to the design of inductorless tuned integrated circuits is described. This design method uses the phase-locked loop (PLL) techniques to obtain the desired tuning and interference-rejection characteristics. The PLL approach does not require tight control of component tolerances, and offers a higher selectivity and frequency capability than the corresponding active-RC synthesis methods. In this paper, basic design parameters for phase-locked integrated circuits are given, and two separate design examples are described. First is a high-frequency (1 to 25 MHz) FM amplifier/detector, which forms a monolithic replacement for the IF strip and the detector sections of a conventional FM receiver or TV sound system. The Copyright © 1969 by The Institute of Electrical and Electronics Engineers, Inc.
引用
收藏
页码:216 / &
相关论文
共 18 条
[1]  
BILOTTI A, 1968, ISSCC DIGEST TECH PA, V11, P116
[2]  
BREESE M, 1961, IRE T SPACE ELECTRON, VSET7, P95
[3]  
CAMENZIND HR, 1969, IEEE J SOLID STATE C, VSC 4, P110
[4]  
CAMENZIND HR, 1969 IEEE NATL TEL C, P228
[5]  
COOK AB, 1968, FREQUENCY MODULATION, pCH5
[6]  
COOK AB, 1968, FREQUENCY MODULATION, pCH7
[7]  
de Bellescize H., 1932, LONDE ELECTRIQUE, V11, P230
[8]  
GAASH AA, 1966, IEEE J SOLID STATE C, VSC 1, P29
[9]  
GARDNER FM, 1966, PHASELOCK TECHNIQUES, P35
[10]  
GILCHRIEST CE, 1958, IRE T TELEMETRY REMO, VTRC4, P20