SCALING THE SILICON BIPOLAR-TRANSISTOR FOR SUB-100-PS ECL CIRCUIT OPERATION AT LIQUID-NITROGEN TEMPERATURE

被引:6
作者
CRESSLER, JD [1 ]
CHEN, TC [1 ]
WARNOCK, JD [1 ]
TANG, DDL [1 ]
YANG, ES [1 ]
机构
[1] COLUMBIA UNIV,FAC ELECT ENGN,DEPT ELECT ENGN,NEW YORK,NY 10027
关键词
D O I
10.1109/16.47773
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We use a two-dimensional device simulator to examine the various profile design strategies for silicon bipolar transistors operating at liquid nitrogen temperature. Special emphasis is placed on the scaling tradeoffs of these design approaches. We conclude that a “relaxed scale” technique based on the maintenance of constant base Gummel number with a slight decrease in emitter doping level probably offers the best overall low-temperature design strategy for scaled double-polysilicon devices. To support these calculations, we have fabricated devices with 0.8-μm, lithography using this design scheme. Transistors are reasonably ideal at low temperatures and have adequate current gain for most digital applications. Unloaded ECL ring oscillators operate at sub-100-ps speeds at liquid nitrogen temperature. Simulations based on measured data indicate that sub-150-ps loaded ECL delays are achievable at about 4-mW power at 87 K if the circuit logic swing is reduced to 300 mV. This analysis suggests that conventionally designed silicon bipolar transistors are potentially attractive candidates for very-high-performance applications in the low-temperature environment. © 1990 IEEE
引用
收藏
页码:680 / 691
页数:12
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