ELECTROPLATED SOLDER JOINTS FOR FLIP-CHIP APPLICATIONS

被引：24

作者：

YUNG, EK ^{[1
]}

TURLIK, I ^{[1
]}

机构：

[1] UNIV N CAROLINA,DEPT ELECT ENGN,CHARLOTTE,NC 28213

来源：

IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY | 1991年 / 14卷 / 03期

关键词：

25;

D O I：

10.1109/33.83943

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

A step-by-step description of MCNC's solder electroplating process for flip-chip applications is provided. The necessity of phasing Cr and Cu in the under-bump metallurgy (UBM), which also functions as the current path during plating, is verified by SEM study of the intermetallics in the reflowed solder joints. Characteristics of the SnPb solder plating bath are presented, and key issues on designing and operating manufacture scale cells are identified. Mathematical modeling of the plating process confirms the capability of the plating process to produce solder bumps of uniform volume and solder composition. Feasibility of the electroplated solder bumping process is demonstrated on dice with an area array of pads of a approximately 0.005-in diameter on a 0.010-in pitch. Data of preliminary mechanical testing conducted to evaluate the integrity of the solder joints are presented.

引用

页码：549 / 559

页数：11

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