APC3-A CHARGE SAMPLING, STORAGE AND READOUT CHIP FOR SILICON DETECTOR READOUT

被引：4

作者：

BORER, K

MUNDAY, DJ

PARKER, MA

ANGHINOLFI, F

ASPELL, P

CAMPBELL, M

JARRON, P

HEIJNE, EHM

SANTIARD, JC

VERWEIJ, H

GOSSLING, C

REICHOLD, A

BONINO, R

CLARK, AG

KAMBARA, H

LAMARRA, D

LEGER, A

RICHEAUX, JP

WU, X

FARES, F

BIBBY, J

WEIDBERG, A

CAMPBELL, D

MURRAY, P

SELLER, P

ROUGET, M

TEIGER, J

机构：

[1] UNIV CAMBRIDGE,CAMBRIDGE,ENGLAND

[2] CERN,CH-1211 GENEVA 23,SWITZERLAND

[3] UNIV DORTMUND,W-4600 DORTMUND 50,GERMANY

[4] UNIV GENEVA,CH-1211 GENEVA 4,SWITZERLAND

[5] UNIV MELBOURNE,PARKVILLE,VIC 3052,AUSTRALIA

[6] UNIV OXFORD,OXFORD,ENGLAND

[7] CENS,F-91190 GIF SUR YVETTE,FRANCE

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 1994年 / 41卷 / 04期

基金：

澳大利亚研究理事会;

关键词：

D O I：

10.1109/23.322864

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The ''APC3'' is a charge sampling and storage chip designed for high speed readout of silicon detectors. It has 32 channels, each with pre-amplifier, integrator and storage capacitors. Current from a silicon detector connected to the input is integrated as a charge and stored on a capacitor. There are 128 capacitors per channel which are used sequentially to store the charge. The charge is held on the storage capacitor until it is either read out or discarded. Logic on the chip manages the storage and retrieval of samples. This logic uses a novel architecture based on a system of pointers and read-out addresses. This paper describes the operation of the chip and measurements of its performance.

引用

页码：1091 / 1094

页数：4