Real-Time Parallel and Fully Pipelined Two-Dimensional DCT Lattice Structures with Application to HDTV Systems

被引:26
作者
Chiu, Ching-Te [1 ]
Liu, K. J. Ray [1 ]
机构
[1] Univ Maryland, Dept Elect Engn, College Pk, MD 20742 USA
关键词
D O I
10.1109/76.134369
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The two-dimensional discrete cosine transform (2-D DCT) has been widely recognized as the most effective technique in Image data compression, especially for high-speed video processing applications, such as high-definition television (HDTV) In this paper, we propose a new fully pipelined architecture to compute the 2-D DCT from a frame-recursive point of view. Based on this approach, two real-time parallel lattice structures for successive frame and block 2-D DCT are developed. These structures are fully-pipelined with throughput rate N clock cycles for an N x N successive input data frame. These are the fastest pipelined structures known so far. Moreover, the resulting 2-D DCT architectures are modular, regular, and locally connected and require only two 1-D DCT blocks that are extended directly from the I-D DCT structure without transposition. It is therefore very suitable for VLSI Implementation for high-speed HDTV systems. We also propose a parallel 2-D DCT architecture and a new scanning pattern for HDTV systems to achieve higher performance. The VLSI Implementation of the 2-D DCT using distributed arithmetic to Increase computational efficiency and reduce round-off error Is also discussed.
引用
收藏
页码:25 / 37
页数:13
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