INHERENTLY MONOTONIC 12-BIT DAC

被引:38
作者
SCHOEFF, JA
机构
[1] Advanced Micro Devices, Sunnyvale
关键词
D O I
10.1109/JSSC.1979.1051296
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The design of 12 bit D/A converters has traditionally required precision thin-film resistors, a trimming method, and a binarily weighted ladder network. This paper describes a 12 bit DAC which uses diffused resistors and requires no trimming to guarantee monotonicity for all grades over the temperature range. The segmented ladder design, departing from the traditional R-2R approach used in virtually all high-speed high resolution converters, provides inherent monotonicity and differentia1 1inearity as high as 13 bits. Also afforded is a more uniform step size over the temperature range than the trimmed 12 bit converters., The only critical resistor matching occurs at the major carries or midpoints of each of the eight segments, and the tolerances are equivalent to that of a 9 bit DAC, or eight times lower than the R-2R approach. In essence, the problem has been divided into eight separate problems, each with tolerances eight times lower than that of a 12 bit DAC. The converter has been found to be immune to variations in temperature, time, process, and mechanical stress. The circuit also features differential high compliance current outputs, wide supply range, and a multiplying input. Copyright © 1979 by The Institute of Electrical and Electronics Engineers, Inc.
引用
收藏
页码:904 / 911
页数:8
相关论文
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CRAVEN RB, 1975, ISSCC DIG TECH P FEB, P212
[2]  
CRAVEN RB, 1975, ISSCC DIG TECH PAPER, P40
[3]  
HAMADE AR, 1976, ISSCC DIG TECH P FEB, P154
[4]  
SCHOEFF JA, 1978, ISSCC DIG TECH P FEB, P132
[5]  
SCHOEFF JA, 1977, INT SOLID STATE FEB, P58
[6]  
SCHOEFF JA, 1975, AN17 PREC MON INC AP
[7]  
WEBB RW, 1978, ISSCC DIG TECH P FEB, P142