HIGH-SPEED NMOS OPERATIONAL-AMPLIFIER FABRICATED USING VLSI TECHNOLOGY

被引：8

作者：

ISHIHARA, T

ENOMOTO, T

YASUMOTO, M

AIZAWA, T

机构：

来源：

ELECTRONICS LETTERS | 1982年 / 18卷 / 04期

关键词：

D O I：

10.1049/el:19820110

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：159 / 161

页数：3

共 7 条

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ENOMOTO, T ;

ISHIHARA, T ;

YASUMOTO, M ;

SHIDA, S .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1980, 27 (06) :457-463

[2]

ENOMOTO T, 1982, ADAPTIVE EQUALIZER D

[3] POTENTIAL OF MOS TECHNOLOGIES FOR ANALOG INTEGRATED-CIRCUITS [J].

HODGES, DA ;

GRAY, PR ;

BRODERSEN, RW .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1978, 13 (03) :285-299

[4] HIGH-PERFORMANCE NMOS OPERATIONAL-AMPLIFIER [J].

SENDEROWICZ, D ;

HODGES, DA ;

GRAY, PR .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1978, 13 (06) :760-766

[5]

TOY E, 1979, NMOS OPERATIONAL AMP, P134

[6] A PROCESS-INSENSITIVE HIGH-PERFORMANCE NMOS OPERATIONAL-AMPLIFIER [J].

TSIVIDIS, YP ;

FRASER, DL ;

DZIAK, JE .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1980, 15 (06) :921-928

[7]

Wada T., 1981, 1981 IEEE International Solid-State Circuits Conference. Digest of Papers, P16

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