PRECISION CAPACITOR RATIO MEASUREMENT TECHNIQUE FOR INTEGRATED-CIRCUIT CAPACITOR ARRAYS

The recent development of integrated circuit capacitor arrays and the growth of their applications have resulted in a need to perform precision testing as an aid to future design improvements. For reasons discussed in this paper, laboratory instruments such as capacitance bridges are not well-suited to this need. In order to test capacitor arrays accurately, a novel technique has been developed. It is based on a special algorithm in which the capacitor array is used as a precisionvoltage divider. A capacitor array tester consisting of both hardware and software has been built which executes this algorithm. This system has been used to perform measurements upon a large number (thousands) of NMOS and CMOS capacitor arrays. The standard deviation of this tester's measurement error is approximately 0.0009 percent of full scale (0.0088 LSB referenced referenced to 10 bits). In contrast with manual testing with a capacitance bridge (requiring 10 min per array), the tester requires less than 5s to fully test an array, mark the circuit and move to the next die position. Copyright © 1979 by The Institute of Electrical and Electronics Engineers, Inc.