SPEED-OPTIMIZED MICROPROCESSOR IMPLEMENTATION OF A DIGITAL-FILTER

被引：3

作者：

TAN, BS

HAWKINS, GJ

机构：

来源：

IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES | 1981年 / 128卷 / 03期

关键词：

D O I：

10.1049/ip-e.1981.0018

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：85 / 93

页数：9

共 10 条

[1]

Allen P. J., 1979, IEE Journal on Computers and Digital Techniques, V2, P177, DOI 10.1049/ij-cdt.1979.0033

[2] DIGITAL-FILTER STRUCTURES DESCRIBED BY DISTRIBUTED ARITHMETIC [J].

BURRUS, CS .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1977, 24 (12) :674-680

[3]

Farhang-Boroujeny B., 1979, IEE Journal on Computers and Digital Techniques, V2, P169, DOI 10.1049/ij-cdt.1979.0032

[4]

LIM YC, 1979, JUL P IEEE INT S CIR, P185

[5] ALGORITHM FOR HIGH-SPEED DIGITAL-FILTERS [J].

LITTLE, WD .

[6]

MACKAY JD, 1978, P IEEE C ASSP

[7]

OSBORNE A, INTRO MICROCOMPUTERS, V2

[8] NEW HARDWARE REALIZATION OF DIGITAL-FILTERS [J].

PELED, A ;

LIU, B .

IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1974, AS22 (06) :456-462

[9]

RABINER LR, 1975, THEORY APPLICATION D

[10]

TRANTHONG, 1976, IEEE T ACOUST SPEECH, V24, P436, DOI 10.1109/TASSP.1976.1162843