A 17-BIT OVERSAMPLING D-TO-A CONVERSION TECHNOLOGY USING MULTISTAGE NOISE SHAPING

被引：34

作者：

MATSUYA, Y

UCHIMURA, K

IWATA, A

KANEKO, T

机构：

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1989年 / 24卷 / 04期

关键词：

D O I：

10.1109/4.34079

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：969 / 975

页数：7

共 15 条

[1] DESIGN METHODOLOGY FOR SIGMA-DELTA-M [J].

AGRAWAL, BP ;

SHENOI, K .

IEEE TRANSACTIONS ON COMMUNICATIONS, 1983, 31 (03) :360-370

[2]

AKAZAWA Y, 1983, JPN J APPL PHYS S2, V22, P115

[3] USE OF LIMIT CYCLE OSCILLATIONS TO OBTAIN ROBUST ANALOG-TO-DIGITAL CONVERTERS [J].

CANDY, JC .

IEEE TRANSACTIONS ON COMMUNICATIONS, 1974, 22 (03) :298-305

[4]

Hayashi T., 1986, IEEE INT SOL STAT CI, P182

[5] 16-BIT A/D CONVERTER AND D/A CONVERTER FOR DIGITAL AUDIO [J].

ISO, Y ;

ARAI, T ;

SHIBUYA, T ;

NOGUCHI, T ;

OKAMOTO, H .

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, 1986, 32 (04) :734-742

[6] A 12-BIT SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER WITH A 15-MHZ CLOCK RATE [J].

KOCH, R ;

HEISE, B ;

ECKBAUER, F ;

ENGELHARDT, E ;

FISHER, JA ;

PARZEFALL, F .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1986, 21 (06) :1003-1010

[7] A 16-BIT OVERSAMPLING A-TO-D CONVERSION TECHNOLOGY USING TRIPLE-INTEGRATION NOISE SHAPING [J].

MATSUYA, Y ;

UCHIMURA, K ;

IWATA, A ;

KOBAYASHI, T ;

ISHIKAWA, M ;

YOSHITOME, T .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1987, 22 (06) :921-929

[8]

MATSUYA Y, 1981, J IECE JAPAN, V81, P25

[9]

MATSUYA Y, 1988, DIG TECH PAPERS S VL, P117

[10] A CMOS STEREO 16-BIT D/A CONVERTER FOR DIGITAL AUDIO [J].

NAUS, PJA ;

DIJKMANS, EC ;

STIKVOORT, EF ;

MCKNIGHT, AJ ;

HOLLAND, DJ ;

BRADINAL, W .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1987, 22 (03) :390-395

← 1 2 →