2 LOOP ADAPTIVE DELTA MODULATION SYSTEMS

被引：7

作者：

CHAKRAVARTHY, CV ^{[1
]}

FARUQUI, MN ^{[1
]}

机构：

[1] INDIAN INST TECHNOL, KHARAGPUR, W BENGAL, INDIA

来源：

关键词：

D O I：

10.1109/TCOM.1974.1092089

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：1710 / 1713

页数：4

共 13 条

CARTMALE, AA ;

STEELE, R .

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[2]

Das J., 1972, Electro-Technology, V16, P41

[3]

DEJAGER F, 1952, PHILIPS RES REP, V7, P442

[4]

FARUQUI MN, 1964, THESIS INDIAN I TECH

[5]

GAUNT WB, 1971, Patent No. 3582784

[6]

GREEFKES JA, 1968, PHILIPS RES REP, V23, P233

[7]

GREEFKES X, 1970, IEEE INT C COMMUNICA, P7

[8] A UNITY BIT CODING METHOD BY NEGATIVE FEEDBACK [J].

INOSE, H ;

YASUDA, Y .

[9] ADAPTIVE DELTA MODULATION WITH A 1-BIT MEMORY [J].

JAYANT, NS .

BELL SYSTEM TECHNICAL JOURNAL, 1970, 49 (03) :321-+

[10]

NAKAMARU A, 1960, DELTA MODULATION, P46