As the consumer demand for small, lightweight electronic communications products continues to grow, manufacturers must search for new and innovative connection technologies that will enable product miniaturization to accelerate. These connection technologies must meet several challenging criteria. For example, increased functionality must be achieved in less board area and with lower board profile at a lower total system cost. While silicon integration assists product designers in accomplishing these aggressive goals, new electronic assembly methods also are essential in maintaining a competitive edge in the marketplace. Ultrafine pitch attachment methods are geared toward driving mass reflow connection methods toward the pitch capabilities of silicon. The most promising of these ultrafine pitch attachment methods is Flip Chip on Board (FCOB). This technique is capable of connecting unpackaged integrated circuits directly to organic printed circuit boards (PCBs), accomplishing the ultimate in assembly miniaturization. The process utilizes solder bumped I/O pads on the chips that are bonded to mating solder bumped sites on the board. In order to produce high quality electronic products in volume with FCOB, characterization of the assembly process is essential. Thorough characterization reveals the critical process variables that must be controlled in production, allowing cost-efficient manufacturing to occur. This paper describes the process characterization of FCOB, and demonstrates the compatibility of the technology with conventional surface mount processes. Key failure mechanisms are identified and discussed with respect to the degree of process control required to eliminate them.
