A 7-MBYTE/S (65 MHZ), MIXED-SIGNAL, MAGNETIC RECORDING CHANNEL DSP USING PARTIAL-RESPONSE SIGNALING WITH MAXIMUM-LIKELIHOOD DETECTION

A mixed-signal, 7.0 Mbyte/s PRML (partial-response maximum likelihood) read/write channel is discussed in this paper. PR-IV (minimum signal bandwidth) for signal encoding is used, along with ML (maximum likelihood) detection to achieve superior error rate performance. Signal equalization is provided using a programmable ten-tap FIR (finite impulse response) digital filter. This read/write channel is implemented on a single chip using analog circuits and 20 K CMOS logic gates. The 7.5 mm square chip uses a 5 V, 1 mum, BICMOS process with a 6 GHz n-p-n and a 1 GHZ p-n-p and is packaged in a 100-lead metal QFPK (quad flat pack) [1].