INPUT COMPRESSION AND EFFICIENT VLSI ARCHITECTURES FOR RANK ORDER AND STACK FILTERS

被引:13
作者
ADAMS, GB
COYLE, EJ
LIN, LC
LUCKE, LE
PARHI, KK
机构
[1] School of Electrical Engineering, Purdue University, West Lafayette
[2] Department of Electrical Engineering, University of Minnesota, Minneapolis
基金
美国国家科学基金会;
关键词
INPUT COMPRESSION; RANK-ORDER FILTERS; STACK FILTERS; UNARY ENCODED RANK; VLSI ARCHITECTURE; WEIGHTED ORDER STATISTIC FILTERS;
D O I
10.1016/0165-1684(94)90159-7
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Rank-order-based filters include rank-order filters, stack filters, and weighted order statistic filters. The output of a rank-order-based filter is always one of the sample points in its input window; which one is chosen depends only upon the ranks and positions of the samples within the window. This paper introduces new architectures for rank-order-based filters. They all achieve fast, efficient operation by exploiting an algorithm called input compression. Under this algorithm, the sample points in the input window are first mapped to their relative ranks - the sample points in a window of size N + 1 would thus be mapped to the integers 0-N. The rank-order-based filter to be implemented is then applied directly to this compressed input, and the rank chosen is then mapped back to the sample of that rank in the original data to obtain the final output. This approach has been used to implement rank-order filters, in which case the same rank is always chosen from the compressed data. In this paper, which rank is chosen also depends on the positions of the ranks in the compressed data. Implementations employing input compression have several advantages. They are computationally efficient like running order sorters, yet can be pipelined to a fine degree like sorting networks. In stack filter implementations, the threshold decomposition circuitry can be eliminated when input compression is combined with unary encoding of the ranks. Weighted order statistic filter implementations based on input compression can support programmable, noninteger weights.
引用
收藏
页码:441 / 453
页数:13
相关论文
共 37 条
[1]  
Arce, Warter, A median filter architecture suitable for VLSI implementation, Proc. 23rd Allerton Conf. Comm. Cont. Comp., pp. 172-181, (1984)
[2]  
Batcher, Sorting networks and their applications, AFIPS Spring Joint Comput. Conf., 32, pp. 307-314, (1968)
[3]  
Boncelet, Recursive algorithms and VLSI implementations for median filtering, Proc. IEEE Internat. Symp. Circuits Systems, (1988)
[4]  
Brownrigg, The weighted median filter, Commun. Assoc. Comput. Mach., 27, pp. 807-818, (1984)
[5]  
Chakrabarti, High sample rate systolic architectures for median filters, Proc. Internat. Symp. Circuits and Systems, pp. 1073-1076, (1992)
[6]  
Chakrabarti, High sample rate architectures for median filters, VLSI Signal Processing V (from the 1992 IEEE Workshop on VLSI Signal Processing), pp. 490-499, (1992)
[7]  
Chen, Bit-serial realization of a class of nonlinear filters based on positive boolean functions, IEEE Trans. Acoust. Speech Signal Process, 36 ASSP, 6, pp. 785-794, (1989)
[8]  
Coyle, Lin, Gabbouj, Optimal stack filtering and the estimation and structural approaches to image processing, IEEE Trans. Acoust. Speech Signal Process., 37, 12, pp. 2037-2066, (1989)
[9]  
Fisher, Systolic algorithms for running order statistics in signal and image processing, J. Digital Systems, 4, 2-3, pp. 251-264, (1982)
[10]  
Fitch, Software and VLSI algorithms for generalized ranked order filtering, IEEE Transactions on Circuits and Systems, 34 CAS, 5, (1987)