A 5-V-ONLY 16-MB FLASH MEMORY WITH SECTOR ERASE MODE

被引:22
作者
JINBO, T
NAKATA, H
HASHIMOTO, K
WATANABE, T
NINOMIYA, K
URAI, T
KOIKE, M
SATO, T
KODAMA, N
OYAMA, K
OKAZAWA, T
机构
[1] NEC IC MICROCOMP SYST LTD,KAWASAKI 211,JAPAN
[2] NEC CORP LTD,ULSI DEVICE DEV LABS,SAGAMIHARA,KANAGAWA 229,JAPAN
关键词
D O I
10.1109/4.165335
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes a 5-V-only 16-Mb CMOS flash memory with sector erase mode. An optimized memory cell with diffusion self-aligned (DSA) drain structure and channel erase are keys to achieving 5-V-only operation. By adopting this erase method and new row decoders to apply negative bias, 512-word sector erase can be realized. The auto chip erase time of 4 s has been achieved by adopting 64-b simultaneous operation and improved erase sequence. The cell size is 1.7 mum x 2.0 mum and the chip size is 6.3 mm x 18.5 mm using 0.6-mum double-layer metal triple-well CMOS technology.
引用
收藏
页码:1547 / 1554
页数:8
相关论文
共 10 条
[1]  
AJIKA N, 1990, DEC IEDM, P115
[2]  
DARRIGO S, 1989, FEB ISSCC, P132
[3]  
KODAMA N, 1991, DEC IEDM, P303
[4]  
KODAMA N, 1991, MAY S VLSI TECHN, P75
[5]  
KUME H, 1991, MAY S VLSI TECHN, P77
[6]  
KURIYAMA M, 1992, FEB ISSCC, P152
[7]  
MIYAWAKI Y, 1991, MAY S VLSI CIRC, P85
[8]  
NAKAMURA Y, 1990, FEB ISSCC, P62
[9]  
NAKAYAMA T, 1991, FEB ISSCC, P260
[10]  
STIEGLER H, 1990, JUN S VLSI CIRC DIG, P103