SEMIMODULARITY AND TESTABILITY OF SPEED-INDEPENDENT CIRCUITS

In this paper, we relate the property of semi-modularity to the testability of speed-independent circuits. We show that, under the pure chaos delay model, live speed-independent circuits that are strongly connected and composed of ANDs, ORs, and C-elements (with a possible inverter on each gate input) can be decomposed into a set of semi-modular circuits and therefore fully testable for certain classes of output stuck-at-faults (OSAFs). In addition, we show that a subclass of such speed-independent circuits are fully testable for all multiple OSAFs and for certain input SAFs (ISAFs) as well. Specifically, we qualify the kind of SAFs that are detectable during the normal operation of speed-independent circuits regardless of individual gate delays. These results demonstrate the inherent self-checking property of speed-independent circuits and indicate the kind of faults for which speed-independent circuits can be easily tested. We also present a CAD tool that checks the testability of a speed-independent circuit.