CONSTANT INTEGER MULTIPLICATION USING MINIMUM ADDERS

被引：138

作者：

DEMPSTER, AG

MACLEOD, MD

机构：

[1] Univ of Cambridge, Cambridge

来源：

IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS | 1994年 / 141卷 / 05期

关键词：

CSD; INTEGER MULTIPLICATION; MULTIPLIER;

D O I：

10.1049/ip-cds:19941191

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new method of formulating constant integer multiplication is presented. It requires fewer adders in general than a canonic signed-digit (CSD) representation; Graphs are used to illustrate multiplier implementation. A general suboptimal algorithm for the design of multipliers of any wordlength is presented. For 32-bit welds, it achieves an average improvement of 26.6% over CSD. Rules for the generation of graphs with the minimum number of adders and subtractors are presented. An exhaustive search algorithm using these rules is described, and applied for wordlengths up to 12 bits. For 12-bit words, it was found that an average improvement of 16% over CSD is achievable.

引用

页码：407 / 413

页数：7

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