STATUS OF THE INTER-LABORATORY DEVELOPMENT OF A HIGH-SPEED STANDARD DATA BUS - FASTBUS

被引:6
作者
LARSEN, RS
机构
[1] Stanford Linear Accelerator Center, Stanford University, Stanford
关键词
D O I
10.1109/TNS.1979.4329708
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The FASTBUS project is an interlaboratory effort to develop a next generation laboratory standard data bus. The principal design goals are high speed (<100 nsec per word block transfers), wide data path (32 bits), identical parallel addressing architectures at both system and Subsystem levels, ability to support multiple parallel master controllers, and ability to support special modes of operation for high energy physics applications. The current status of development is briefly described. Copyright © 1978 by The Institute of Electrical and Electronics Engineers, Inc.
引用
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页码:679 / 685
页数:7
相关论文
共 2 条
[1]  
1978, IEEE T NUCL SCI, V25, P735
[2]  
1977, TID26621 US NIM COMM