PROCESSOR RECONFIGURATION THROUGH INSTRUCTION-SET METAMORPHOSIS

[1] ATHANAS PM, 1992, THESIS BROWN U

[2] BERTIN P, 1989, 3 DIG EQ CORP PAR RE

[3] GAJSKI DD, 1988, SILICON COMPILATION

[4] BUILDING AND USING A HIGHLY PARALLEL PROGRAMMABLE LOGIC ARRAY [J]. COMPUTER, 1991, 24 (01) : 81 - 89

[5] EXPERIMENTS WITH A PROGRAM TIMING TOOL BASED ON SOURCE-LEVEL TIMING SCHEMA (REPRINTED FROM PROC 11TH IEEE REAL-TIME SYSTEMS SYMPOSIUM, DECEMBER, PG 72, 1990) [J]. COMPUTER, 1991, 24 (05) : 48 - 57

[6] SYSTEM AND APPLICATION SOFTWARE FOR THE ARMSTRONG MULTIPROCESSOR [J]. COMPUTER, 1988, 21 (06) : 38 - 52

[7] HARP - FORTRAN TO SILICON [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1989, 8 (06) : 649 - 660

[8] THALL RM, 1977, THESIS U MICH

[9] 1991, PROGRAMMABLE GATE AR

[1] ATHANAS PM, 1992, THESIS BROWN U

[2] BERTIN P, 1989, 3 DIG EQ CORP PAR RE

[3] GAJSKI DD, 1988, SILICON COMPILATION

[4] BUILDING AND USING A HIGHLY PARALLEL PROGRAMMABLE LOGIC ARRAY [J]. COMPUTER, 1991, 24 (01) : 81 - 89

[5] EXPERIMENTS WITH A PROGRAM TIMING TOOL BASED ON SOURCE-LEVEL TIMING SCHEMA (REPRINTED FROM PROC 11TH IEEE REAL-TIME SYSTEMS SYMPOSIUM, DECEMBER, PG 72, 1990) [J]. COMPUTER, 1991, 24 (05) : 48 - 57

[6] SYSTEM AND APPLICATION SOFTWARE FOR THE ARMSTRONG MULTIPROCESSOR [J]. COMPUTER, 1988, 21 (06) : 38 - 52

[7] HARP - FORTRAN TO SILICON [J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1989, 8 (06) : 649 - 660

[8] THALL RM, 1977, THESIS U MICH

[9] 1991, PROGRAMMABLE GATE AR