共 25 条
[1]
Burman, Et al., Performance Analysis Techniques for IC Manufacturing Lines, AT&T Technical Journal, 65, pp. 46-57, (1986)
[2]
Chen, Et al., Empirical Evaluation of a Queuing Network Model for Semiconductor Wafer Fabrication, Operations Research, 36, 2, pp. 202-215, (1988)
[3]
Runyan, Bean, Semiconductor Integrated Circuit Processing Technology, (1990)
[4]
Sze, VLSI Technology, (1983)
[5]
Hogg, Fowler, Flow Control in Semiconductor Manufacturing: A Survey and Projection of Needs, SEMATECH Non-Confidential Document, No. 91110757A–GEN, (1991)
[6]
Constantine, Combinatorial Theory and Statistical Design, (1987)
[7]
Miller, Simulation of a Semiconductor Manufacturing Line, Communications of the ACM, 33, pp. 98-108, (1990)
[8]
Johri, Dispatching in an Integrated Circuit Wafer Fabrication Line, Proceedings, Winter Simulation Conference, pp. 918-921, (1989)
[9]
Glassey, Resende, Closed-Loop Job Release Control for VLSI Circuit Manufacturing, IEEE Transactions on Semiconductor Manufacturing, 1, pp. 36-46, (1988)
[10]
Glassey, Resende, A Scheduling Rule for Job Release in Semiconductor Fabrication, Operations Research Letters, 7, pp. 213-217, (1988)