ANALOG NETWORK TESTABILITY MEASUREMENT - A SYMBOLIC FORMULATION APPROACH

被引:24
作者
CARMASSI, R [1 ]
CATELANI, M [1 ]
IUCULANO, G [1 ]
LIBERATORE, A [1 ]
MANETTI, S [1 ]
MARINI, M [1 ]
机构
[1] SMA SPA,DEPT INTEGRATED LOGIST SUPPORT,FLORENCE,ITALY
关键词
D O I
10.1109/19.119770
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new method for analog network testability measurement is presented. The method is based on a symbolic formulation approach for the circuit model and an efficient program, SAPTES, has been developed.
引用
收藏
页码:930 / 935
页数:6
相关论文
共 25 条
[1]  
BANDFLER JW, 1985, P IEEE, V73
[2]   CONDITIONS FOR NETWORK-ELEMENT-VALUE SOLVABILITY [J].
BERKOWITZ, RS .
IRE TRANSACTIONS ON CIRCUIT THEORY, 1962, CT 9 (01) :24-&
[3]   IMPROVEMENTS TO NUMERICAL TESTABILITY EVALUATION [J].
CATELANI, M ;
IUCULANO, G ;
LIBERATORE, A ;
MANETTI, S ;
MARINI, M .
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 1987, 36 (04) :902-907
[4]   SEARCH ALGORITHM FOR THE SOLUTION OF THE MULTIFREQUENCY FAULT DIAGNOSIS EQUATIONS [J].
CHEN, HSM ;
SAEKS, R .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1979, 26 (07) :589-594
[5]  
DEJKA WJ, 1977, P AUTOTESTCON
[6]  
FERNANDEZ FV, 1991, P IEEE INT S CIRCUIT, P810
[7]   ISAAC - A SYMBOLIC SIMULATOR FOR ANALOG INTEGRATED-CIRCUITS [J].
GIELEN, GGE ;
WALSCHARTS, HCC ;
SANSEN, WMC .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1989, 24 (06) :1587-1597
[8]  
HASSOUN MM, 1989, MAY IEEE INT S CIRC
[9]  
HVELSMAN LP, 1991, P ISCAS, P790
[10]  
IUCULANO G, 1986, IEEE T CIRC SYST, V33