A PARALLEL FULL ADDER CIRCUIT USING JOSEPHSON-JUNCTIONS

被引：5

作者：

HASUO, S ^{[1
]}

SUZUKI, H ^{[1
]}

DAZAI, K ^{[1
]}

机构：

[1] FUJITSU LABS LTD,OPT SEMICOND DEVICES LAB,NAKAHARA KU,KAWASAKI,KANAGAWA 211,JAPAN

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1981年 / 16卷 / 01期

关键词：

D O I：

10.1109/JSSC.1981.1051534

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

收藏

页码：43 / 48

页数：6

相关论文

共 16 条

[1] POTENTIAL OF SUPERCONDUCTIVE JOSEPHSON TUNNELING TECHNOLOGY FOR ULTRAHIGH PERFORMANCE MEMORIES AND PROCESSORS
ANACKER, W
[J]. IEEE TRANSACTIONS ON MAGNETICS, 1969, MAG5 (04) : 968 - &
[2] COMPUTING AT 4-DEGREES-K
ANACKER, W
[J]. IEEE SPECTRUM, 1979, 16 (05) : 26 - 37
[3] MODEL FOR A 15-NS 16K-RAM WITH JOSEPHSON JUNCTIONS
BROOM, RF
GUERET, P
KOTYCZKA, W
MOHR, TO
MOSER, A
OOSENBRUG, A
WOLF, P
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1979, 14 (04) : 690 - 699
[4] JOSEPHSON LATCH
DAVIDSON, A
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1978, 13 (05) : 583 - 590
[5] LOOP DECODER FOR JOSEPHSON MEMORY ARRAYS
FARIS, SM
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1979, 14 (04) : 699 - 707
[6] GHEEWALA TR, 1979, 1ST P SPEC C GIG LOG, P12
[7] HARRIS RE, 1979, APPL PHYS LETT, V35, P720, DOI 10.1063/1.91238
[8] JOSEPHSON TUNNELLING LOGIC ADDER
HERRELL, DJ
[J]. IEEE TRANSACTIONS ON MAGNETICS, 1974, MA10 (03) : 864 - 867
[9] EXPERIMENTAL MULTIPLIER CIRCUIT BASED ON SUPERCONDUCTING JOSEPHSON DEVICES
HERRELL, DJ
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1975, 10 (05) : 360 - 368
[10] HERRELL DJ, 1974, Patent No. 3784854