FAST FOURIER TRANSFORM HARDWARE IMPLEMENTATIONS - AN OVERVIEW

被引：32

作者：

BERGLAND, GD

机构：

[1] Bell Telephone Laboratories, Inc., Whippany

来源：

IEEE TRANSACTIONS ON AUDIO AND ELECTROACOUSTICS | 1969年 / AU17卷 / 02期

关键词：

D O I：

10.1109/TAU.1969.1162041

中图分类号：

O42 [声学];

学科分类号：

070206 ; 082403 ;

摘要：

This discussion served as an introduction to the Hardware Implementations Session of the IEEE Workshop on Fast Fourier Transform Processing. It introduces the problems associated with implementing the FFT algorithm in hardware and provides a frame of reference for characterizing specific implementations. Many of the design options applicable to an FFT processor are described, and a brief comparison of several machine organizations is given. Copyright © 1969 by The Institute of Electrical and Electronics Engineers, Inc.

引用

页码：104 / &

共 20 条

[1]

BERGLAND GD, 1967, MATH COMPUT, V21, P236

[2] A FAST FOURIER TRANSFORM ALGORITHM FOR REAL-VALUED SERIES [J].

BERGLAND, GD .

COMMUNICATIONS OF THE ACM, 1968, 11 (10) :703-+

[3]

BERGLAND GD, 1968, MATH COMPUT, V22, P275

[4]

BERGLAND GD, 1969, IEEE T ACOUST SPEECH, VAU17, P125

[5]

BERGLAND GD, 1969, IEEE T AUDIO ELECTRO, VAU17, P109

[6]

BERGLAND GD, 1967, IEEE T ELECTRONIC CO, VEC16, P180

[7]

BLUESTEIN LI, 1968 NEREM REC, P218

[8]

Brenner N. M., 1967, 19672 MIT LINC LAB

[9] AN ALGORITHM FOR MACHINE CALCULATION OF COMPLEX FOURIER SERIES [J].

COOLEY, JW ;

TUKEY, JW .

MATHEMATICS OF COMPUTATION, 1965, 19 (90) :297-&

[10]

COOLEY JW, 1966, SHARE3465 DOC

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