PIPELINE INTERLEAVED PROGRAMMABLE DSPS - ARCHITECTURE

The authors apply an old but rarely used architectural approach to the design of single-chip signal processors so that the potential benefits of extensive pipelining can be fully realized. Instead of a single program, multiple programs are interleaved in a pipeline. Each program experiences none of the difficulties of pipelining and consequently are easier to write and optimize, regardless of the amount of pipelining used. The main advantage is that much more pipelining can be used without disturbing the programming. A specific experimental architecture is outlined.