COMPUTER-AIDED-DESIGN OF VLSI FIR FILTERS

[1] AHMED HM, 1982, COMPUTER, V15, P65, DOI 10.1109/MC.1982.1653828

[2] Avizienis A., 1961, IRE T ELECTRON COMPU, VEC-10, P389, DOI DOI 10.1109/TEC.1961.5219227

[3] BIANCOMANO V, 1986, ELECTRON DES 0417

[4] BINDRA A, 1984, ELECTRON ENG TI 1119

[5] Burks A., 1970, ESSAYS CELLULAR AUTO

[6] BLOCK IMPLEMENTATION OF DIGITAL FILTERS [J]. IEEE TRANSACTIONS ON CIRCUIT THEORY, 1971, CT18 (06): : 697 - +

[7] COMPLETELY-PIPELINED ARCHITECTURES FOR DIGITAL SIGNAL-PROCESSING [J]. IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1983, 31 (04): : 1016 - 1023

[8] A NOTE ON FREE ACCUMULATION IN VLSI FILTER ARCHITECTURES [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1985, 32 (03): : 291 - 296

[9] OPTIMAL CHOICE OF INTERMEDIATE LATCHING TO MAXIMIZE THROUGHPUT IN VLSI CIRCUITS [J]. IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1984, 32 (01): : 28 - 33

[10] CAPPELLO PR, 1985, MAR P INT C AC SPEEC

[1] AHMED HM, 1982, COMPUTER, V15, P65, DOI 10.1109/MC.1982.1653828

[2] Avizienis A., 1961, IRE T ELECTRON COMPU, VEC-10, P389, DOI DOI 10.1109/TEC.1961.5219227

[3] BIANCOMANO V, 1986, ELECTRON DES 0417

[4] BINDRA A, 1984, ELECTRON ENG TI 1119

[5] Burks A., 1970, ESSAYS CELLULAR AUTO

[6] BLOCK IMPLEMENTATION OF DIGITAL FILTERS [J]. IEEE TRANSACTIONS ON CIRCUIT THEORY, 1971, CT18 (06): : 697 - +

[7] COMPLETELY-PIPELINED ARCHITECTURES FOR DIGITAL SIGNAL-PROCESSING [J]. IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1983, 31 (04): : 1016 - 1023

[8] A NOTE ON FREE ACCUMULATION IN VLSI FILTER ARCHITECTURES [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1985, 32 (03): : 291 - 296

[9] OPTIMAL CHOICE OF INTERMEDIATE LATCHING TO MAXIMIZE THROUGHPUT IN VLSI CIRCUITS [J]. IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1984, 32 (01): : 28 - 33

[10] CAPPELLO PR, 1985, MAR P INT C AC SPEEC