A SIMPLE EEPROM CELL USING TWIN POLYSILICON THIN-FILM TRANSISTORS

被引:27
作者
CAO, M
ZHAO, TM
SARASWAT, KC
PLUMMER, JD
机构
[1] Center for Integrated Systems, Stanford University, Stanford
关键词
6;
D O I
10.1109/55.296224
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A planar twin polysilicon thin film transistor (TFT) EEPROM cell fabricated with a simple low temperature (less-than-or-equal-to 600-degrees-C) process is demonstrated in this work. The gate electrodes of the two TFT's are connected to form the floating gate of the cell, while the source and drain of the larger TFT are connected to form the control gate. The cell is programmed and erased by Fowler-Nordheim tunneling. The threshold voltage of the cell can be shifted by as much as 8 V after programming. This new EEPROM cell can dramatically reduce the cost of production by reducing manufacturing complexity.
引用
收藏
页码:304 / 306
页数:3
相关论文
共 6 条
  • [1] BHAT N, 1994, IN PRESS MAY P SIL N
  • [2] CHEN S, 1993, P ACTIVE MATRIX LIQU, P26
  • [3] HEAVY OXYNITRIDATION TECHNOLOGY FOR FORMING HIGHLY RELIABLE FLASH-TYPE EEPROM TUNNEL OXIDE-FILMS
    FUKUDA, H
    UCHIYAMA, A
    KURAMOCHI, T
    HAYASHI, T
    IWABUCHI, T
    [J]. ELECTRONICS LETTERS, 1992, 28 (19) : 1781 - 1783
  • [4] KOYAMA S, 1992, P S VLSI TECHNOLOGY, P44
  • [5] OHSAKI K, 1993, P S VLSI TECHNOLOGY, P55
  • [6] ZHAO T, 1994 NONV SEM MEM WO