Resist systems using synchrotron radiation x-ray lithography for the fabrication of 0.25 mum (Leff) devices has been investigated [R. Viswanathan et al. (unpublished)]. In this study, a chemically amplified negative crosslinking IBM resist, CGR [W. Conley and J. Gelorme, J. Vac. Sci. Technol. B 10, 2570 (1992)], for use on the contact level was the focus. Linewidth control and contrast curves of this system have been studied as a function of a number of parameters including changes in formulations. Mask limited resolution to 0.25 mum feature size (line/space array) has been achieved using a 40 mum mask-to-wafer gap. More important for device fabrication, reproducibility of exposure latitude and resist bias has been demonstrated and will be discussed. Data on the effect of postapply and postexposure bake conditions on the process will also be presented. It is of interest to note that this resist shows little change in linewidth with respect to postexposure bake temperature. This resist system was modeled using aerial images generated from XMAS and a thresholding resist development model. The model indicates that the wall profiles for this resist should be somewhat more tapered for isolated spaces than for isolated lines or line/space arrays and is verified experimentally. It is believed that this is related to the slope of the aerial image at the dose used and not inherent to the resist system. A positive resist was also looked at for application on the polysilicon level. A process that has been previously described was used [(a) A. Katnani, Proc. SPIE (in press); (b) D. Seeger, R. Wood, J. Gelorme, and K. Stewart, KTI Interface '89 (unpublished), p. 351; (c) R. Wood, C. Lyons, R. Mueller, and J. Conway, KTI Interface '88 (unpublished), p. 341.] and looked at linewidth control across device wafers. Line widths for the polysilicon gates were measured across topography, across field, and from field-to-field and will be described in detail.
