THE SVX2 READOUT CHIP

被引:18
作者
ZIMMERMAN, T [1 ]
SARRAJ, M [1 ]
YAREMA, R [1 ]
KIPNIS, I [1 ]
KLEINFELDER, S [1 ]
LUO, L [1 ]
MILGROME, O [1 ]
机构
[1] UNIV CALIF BERKELEY,LAWRENCE BERKELEY LAB,BERKELEY,CA 94720
关键词
D O I
10.1109/23.467787
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new readout chip called SVX2 is being designed for silicon detector systems at Fermilab. SVX2 is essentially an upgrade of the presently used SVX chip and contains extensive performance and feature enhancements. SVX2 is designed to accommodate much shorter beam crossing times (132 ns to 400 ns) with minimal increase in noise and power. Analog signal delay is formed by a double correlated sampling pipeline in order to allow time for trigger formation. Signal digitization of up to eight bits is performed on the chip with an A/D converter per channel. This allows threshold setting, sparsification, and readout to be purely digital, Design philosophy will be discussed and test results presented.
引用
收藏
页码:803 / 807
页数:5
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