A PROCESS FOR FABRICATING SUBMICRON ALL-REFRACTORY JOSEPHSON TUNNEL JUNCTION CIRCUITS

被引:13
作者
DANG, H
RADPARVAR, M
机构
[1] HYPRES Inc., Elmsford, N.Y. 10523
关键词
D O I
10.1109/20.133881
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We describe a process for fabricating submicron Josephson junctions suitable for integration in small and medium scale integrated circuits. This junction process utilizes a double layer SiO2 lift-off process in a cross-type geometry to define Josephson junctions. A photoresist strip with an arbitrary length and a fixed width defines the length of the junction. Its width is defined simultaneously with the metallization strip that crosses the first strip. The double layer SiO2 insures a pinhole-free oxide and yields excellent insulating properties suitable for medium scale circuit applications. We used this process to fabricate Nb/AlO(x)/Nb and NbN/MgO/NbN tunnel junctions as small as 0.5-mu-m2 with figures of merit (V(m)) larger than 30 mV. We report on the repeatability of this process and its utility in high current density Josephson junction circuits.
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页码:3157 / 3160
页数:4
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