IMPLEMENTING NEURAL ARCHITECTURES USING ANALOG VLSI CIRCUITS

被引:72
作者
MAHER, MAC
DEWEERTH, SP
MAHOWALD, MA
MEAD, CA
机构
来源
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS | 1989年 / 36卷 / 05期
关键词
D O I
10.1109/31.31311
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:643 / 652
页数:10
相关论文
共 35 条
[1]  
ALLEN T, VISUAL COMMUNICATION, P1040
[2]   CORTICAL CONNECTIONS AND PARALLEL PROCESSING - STRUCTURE AND FUNCTION [J].
BALLARD, DH .
BEHAVIORAL AND BRAIN SCIENCES, 1986, 9 (01) :67-90
[3]  
BARLOW HB, 1982, SENSES
[4]  
BEKESY GV, 1967, SENSORY INHIBITION
[5]   AXONAL DELAY-LINES FOR TIME MEASUREMENT IN THE OWLS BRAIN-STEM [J].
CARR, CE ;
KONISHI, M .
PROCEEDINGS OF THE NATIONAL ACADEMY OF SCIENCES OF THE UNITED STATES OF AMERICA, 1988, 85 (21) :8311-8315
[6]  
DEWEERTH SP, 1987, THESIS CALIFORNIA I
[7]  
DEWEERTH SP, 1988, ADV RES VLSI
[8]   EFFECTS OF SPACE-CHARGE LAYER WIDENING IN JUNCTION TRANSISTORS [J].
EARLY, JM .
PROCEEDINGS OF THE INSTITUTE OF RADIO ENGINEERS, 1952, 40 (11) :1401-1406
[9]   WIDEBAND NEGATIVE-CURRENT MIRROR [J].
GILBERT, B .
ELECTRONICS LETTERS, 1975, 11 (06) :126-127
[10]   A PRECISE 4-QUADRANT MULTIPLIER WITH SUBNANOSECOND RESPONSE [J].
GILBERT, B .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1968, SC 3 (04) :365-&