AVALANCHE MULTIPLICATION IN A COMPACT BIPOLAR-TRANSISTOR MODEL FOR CIRCUIT SIMULATION

被引：25

作者：

KLOOSTERMAN, WJ

DEGRAAFF, HC

机构：

[1] Philips Research Lab, Eindhoven, Neth

来源：

关键词：

14;

D O I：

10.1109/16.30944

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：1376 / 1380

页数：5

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DEGRAAFF, HC ;

KLOOSTERMAN, WJ .

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[5]

DEGRAAFF HC, 1977, PROCESS DEVICE MODEL

[6]

DEGRAAFF HC, 1986, PROCESS DEVICE MODEL

[7]

Divekar D. A., 1982, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, VCAD-1, P112, DOI 10.1109/TCAD.1982.1270001

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[10]

KIRK CT, 1962, IRE T ELECTRON DEV, V9, P164