DESIGN OF CELLULAR ARRAYS FOR ARITHMETIC

被引：5

作者：

DEVERELL, J ^{[1
]}

机构：

[1] TWICKENHAM COLL TECHNOL, DEPT ENGN TECHNOL, EGERTON RD, TWICKENHAM, MIDDLESEX, ENGLAND

来源：

RADIO AND ELECTRONIC ENGINEER | 1974年 / 44卷 / 01期

关键词：

D O I：

10.1049/ree.1974.0005

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：21 / 26

页数：6

共 15 条

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[13] ITERATIVE LOGICAL NETWORK FOR PARALLEL MULTIPLICATION [J].

HOFFMANN, JC ;

LACAZE, B ;

CSILLAG, P .

[14] CELLULAR LOGIC-IN-MEMORY ARRAYS [J].

KAUTZ, WH .

[15] VERSATILE CELLULAR ARRAY FOR BINARY ARITHMETIC [J].

WHITE, G .

RADIO AND ELECTRONIC ENGINEER, 1971, 41 (10) :463-+