ELECTRICAL CHARACTERISTICS OF SCALED CMOSFETS WITH SOURCE/DRAIN REGIONS FABRICATED BY 7-DEGREES AND 0-DEGREES TILT-ANGLE IMPLANTATIONS

The differences of electrical characteristics in trench-isolated n-well CMOSFET's with LDD- and EPS-regions fabricated by 7 degrees and 0 degrees tilt-angle phosphorous implantations are measured and qualitatively explained. The CMOSFET's have channel lengths ranging from 5 to 0.4 mu m and a channel width of 10 mu m. The differences in impurity profiles due to the channeling ions by 0 degrees-implantation cause the clear changes in the punchthrough-current characteristics and the substrate bias-voltage dependences of threshold voltages for both n- and p-MOSFET's. Meanwhile n- and p-MOSFET's fabricated by 7 degrees and 0 degrees implantations show nearly the same characteristics of threshold voltages and subthreshold swings which are almost determined by the impurity profiles in each channel region because the impurity profiles are scarcely affected bg the channeling ions.