A VERTICALLY INTEGRATED GAAS BIPOLAR DYNAMIC RAM CELL WITH STORAGE TIMES OF 4.5H AT ROOM-TEMPERATURE

被引：12

作者：

STELLWAG, TB

COOPER, JA

MELLOCH, MR

机构：

[1] School of Electrical Engineering, Purdue University, West Lafayette, IN.

来源：

IEEE ELECTRON DEVICE LETTERS | 1992年 / 13卷 / 02期

关键词：

D O I：

10.1109/55.144981

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The storage times of FET-accessed GaAs dynamic RAM cells are limited to less than 1 min at room temperature by gate leakage in the access transistor. These transistor leakage mechanisms have been eliminated by designing a vertically integrated DRAM cell in which an n-p-n bipolar access transistor is merged with a p-n-p storage capacitor. Storage times of 4.5 h are obtained at room temperature, a 1000-fold increase over the best FET-accessed cells.

引用

页码：129 / 131

页数：3