CHARACTERIZATION AND MODELING OF 2ND BREAKDOWN IN NMOSTS FOR THE EXTRACTION OF ESD-RELATED PROCESS AND DESIGN PARAMETERS

A technique is presented to determine the effective process and design-related parameters from the high-current I-V characteristics of NMOST's, for use in the development of ESD protection circuits. Test structures from a fully salicided, LDD MOS process were characterized with a transmission line pulse generator to obtain the snapback voltages and the second-breakdown trigger currents (I(t2)). Good correlations are shown between I(t2) and the Human Body Model (HBM) ESD damage thresholds. It was seen that homogeneous current injection in the avalanching diffusions is imperative for good second breakdown behavior. A simplified thermal model, with second breakdown as the boundary condition for damage, was used in the extraction of the effective junction depth, depletion width, and transistor width under high-current conditions. Experimental data obtained for the power-to-failure as a function of the time-to-failure showed a good fit to the model. In addition, a possible extension of the technique, to use dc characterization to monitor ESD behavior, is presented.