AN INTERACTIVE 2-LEVEL ARCHITECTURE FOR A MEMORY NETWORK PATTERN CLASSIFIER

Multi-level architectures for memory network pattern classifiers can offer improved performance compared with a single layer configuration, but the allocation of decision-making between the layers has generally been such that the classification computation is divided into clearly disjoint operations partitioned among the processing layers. This letter demonstrates how introducing a degree of interaction between the computational layers can enhance error-rate performance and offer increased structural flexibility to the system designer. © 1990.