The use of the digital computer in the simulation of electronic circuit performance has grown rapidly in the past few years. This has enabled one to perform accurate computer-aided circuit analysis using non-linear devices. The extension and accuracy of this technique depends strongly on the accuracy of the semiconductor device mathematical models used and is particularly useful when analyzing integrated circuits. This present paper describes a computer model of an n-p-n transistor in an integrated circuit utilizing p-n junction isolation. This model is derived from the hole-electron flow across the various junctions and also accounts for current flow across the substrate junction. In addition to the regular transistor, this new equivalent circuit model requires a parasitic transistor unit along with a current generator to account for the effect of the substrate. Under some operating conditions, this model is simplified to include one diode and a current generator in addition to the transistor, and in other circumstances to require only a simple current generator along with the transistor itself. The measurement necessary for determining the parameters of the complete model are identified. The pertinent constants can be obtained from the terminal currents of the device under specified operating conditions. © 1969.