QUANTITATIVE CORRELATIONS BETWEEN THE PERFORMANCE OF POLYSILICON EMITTER TRANSISTORS AND THE EVOLUTION OF POLYSILICON SILICON INTERFACIAL OXIDES UPON ANNEALING

The performance of polysilicon emitter transistors is attributed to depend, to varying degrees, on the presence of an either intentional or unintentional silicon-oxide layer along the polysilicon/silicon interface. The well-reported breakup of this interfacial oxide during process annealing has recently been quantified as a function of process annealing time and temperature. In this paper, correlations between oxide breakup and polysilicon-emitter bipolar characteristics are quantitatively established by introducing kinetic terms for oxide breakup in the bipolar transport equations. It is verified that emitter resistance largely depends on the continuity of the interfacial oxide. Similarly, oxide breakup is seen to directly result in an increase in base current up to temperatures of approximately 950-degrees-C (for 30-min anneals), above which the changing structure of the polysilicon is found to play the dominant role in the rise of base current. These observations establish that both the interfacial oxide and the polysilicon layer are responsible for the enhanced gain seen in polysilicon emitter transistors. With the contributions of the oxide and the polysilicon quantitatively understood, it becomes possible to simulate polysilicon emitter device characteristics as a function of process conditions.