HIGH-SPEED CMOS I/O BUFFER CIRCUITS

被引：8

作者：

ISHIBE, M

OTAKA, S

TAKEDA, J

TANAKA, S

TOYOSHIMA, Y

TAKATSUKA, S

SHIMIZU, S

机构：

[1] TOSHIBA MICROELECT CORP,SAIWAI KU,KAWASAKI 210,JAPAN

[2] TOSHIBA CO LTD,SEMICOND DEVICE ENGN LAB,SAIWAI KU,KAWASAKI 210,JAPAN

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1992年 / 27卷 / 04期

关键词：

D O I：

10.1109/4.126561

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Very high-speed off-chip data rates have been difficult to achieve in CMOS technologies. This paper describes an all-CMOS set of I/O buffer circuits, which use current-mode and impedance matching techniques, capable of transmitting off-chip at 1-Gb / s data rates. The circuits are also compatible with voltage-mode signal levels for ECL input and CMOS output circuits.

引用

页码：671 / 673

页数：3