ITERATIVE SCHEME FOR 1- AND 2-DIMENSIONAL DC-TRANSISTOR SIMULATION

被引：59

作者：

SLOTBOOM, JW

机构：

[1] Philips Research Laboratories NV Philips' Gloeilampenfabrieken, Eindhoven

来源：

ELECTRONICS LETTERS | 1969年 / 5卷 / 26期

关键词：

D O I：

10.1049/el:19690510

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A numerical iterative scheme is presented for the solution of the 1- and 2-dimensional semiconductor d.c. transport equations. This scheme is applied to an n-p-n transistor structure. Input data are geometry, doping profile, boundary conditions and, optionally, mobility dependencies and ger.era-tion-recombination law. © 1969, The Institution of Electrical Engineers. All rights reserved.

引用

页码：677 / &

共 9 条

[1] Bellman R.E., 1965, QUASILINEARIZATION N
[2] CAUGHEY DM, 1967, 1967 IEEE INT EL C T
[3] COLLINS TW, 1968, 1968 INT EL DEV M WA
[4] AN ACCURATE NUMERICAL STEADY-STATE 1-DIMENSIONAL SOLUTION OF P-N JUNCTION
DEMARI, A
[J]. SOLID-STATE ELECTRONICS, 1968, 11 (01) : 33 - +
[5] NUMERICAL ANALYSIS OF FORWARD AND REVERSE BIAS POTENTIAL DISTRIBUTION IN A 2-DIMENSIONAL P-N JUNCTION WITH APPLICATIONS TO CAPACITANCE CALCULATIONS
DUBOCK, P
[J]. ELECTRONICS LETTERS, 1969, 5 (11) : 236 - &
[6] GOSH HN, 1967, SOLID STATE ELECT, V10, P705
[7] GUMMEL HK, 1964, IEEE T, VED11, P455
[8] ANALYSIS OF IMPURITY ATOM DISTRIBUTION NEAR DIFFUSION MASK FOR A PLANAR P-N JUNCTION
KENNEDY, DP
OBRIEN, RR
[J]. IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1965, 9 (03) : 179 - &
[9] Varga R.S., 1962, ITERATIVE ANAL

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