FULLY ITERATIVE FAST ARRAY FOR BINARY MULTIPLICATION AND ADDITION

被引：40

作者：

GUILD, HH

机构：

[1] Department of Physics Kingston College of Technology, Kingston upon Thames, Surrey, Penrhyn Road

来源：

ELECTRONICS LETTERS | 1969年 / 5卷 / 12期

关键词：

D O I：

10.1049/el:19690201

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A fast combinational circuit is described which can be used both as a multiplier and as an adder, either separately or together, giving a parallel binary output. The structure, which is completely iterative in terms of both cell logic and cell-interconnection pattern, is advantageous in large-scale integration. © 1969, The Institution of Electrical Engineers. All rights reserved.

引用

页码：263 / &