PRESSURE-SENSITIVE INSULATED GATE FIELD-EFFECT TRANSISTOR (PSIGFET)

A pressure-sensitive insulated gate field-effect transistor has been developed. The device is an elevated gate field-effect transistor. It consists of a p-type silicon substrate in which two n+ regions, the source and drain, are formed. The gate electrode is an Al film sandwiched in a PECVD Si3N4 microdiaphragm, resembling a pillbox, which covers the gate oxide, drain and source. The space between the gate electrode and the oxide is vacuum or an air gap (0.5 μm). When pressure is applied on the diaphragm, it deflects and causes a change in the gate capacitance, and thus modulates the conductance of the channel between source and drain. A general theory dealing with the characteristics of this pressure-sensitive insulated gate field-effect transistor has been derived, and the device fabricated. The chip size of the device is 600 × 1050 μm. The diaphragm size is 200 × 200 μm, with a measured pressure range of 300 Torr. Characterization of the device has been performed. The current-voltage characteristics, with pressure as parameters, have been demonstrated to closely follow the theoretical result. They show, as predicted, nonlinear characteristics. The linearity of threshold voltage versus pressure transfer curves has also been demonstrated. The temperature effect on the device performance has been analyzed and measured. Two temperature compensation schemes are presented. The temperature coefficient can be improved to 0.08 mmHg/°C. The noise of the device and the measurement circuit is about ±0.4 mmHg in a period of 10 min and the cut-off frequency is about 20 kHz. © 1990.