HARDWARE-SOFTWARE COSYNTHESIS FOR DIGITAL-SYSTEMS

被引：200

作者：

GUPTA, RK ^{[1
]}

DEMICHELI, G ^{[1
]}

机构：

[1] STANFORD UNIV,DEPT ELECT ENGN,STANFORD,CA 94305

来源：

IEEE DESIGN & TEST OF COMPUTERS | 1993年 / 10卷 / 03期

关键词：

D O I：

10.1109/54.232470

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

As system design grows increasingly complex, the use of predesigned components, such as general-purpose microprocessors, can simplify synthesized hardware. While the problems in designing systems that contain processors and application-specific integrated circuit chips are not new, computer-aided synthesis of such heterogeneous or mixed systems poses unique challenges. Here, we demonstrate the feasibility of synthesizing heterogeneous systems by using timing constraints to delegate tasks between hardware and software so that performance requirements can be met.

引用

页码：29 / 41

页数：13

共 24 条

[1]

BERTIN P, 1989, SYSTOLIC ARRAY PROCE, P300

[2]

BUCK J, IN PRESS INT J COMPU

[3]

CHIODO M, 1993, UCBERL M9349 U CAL B

[4]

CHIODO M, 1992, OCT INT WORKSH HARDW

[5] TIMING CONSTRAINTS OF REAL-TIME SYSTEMS - CONSTRUCTS FOR EXPRESSING THEM, METHODS OF VALIDATING THEM [J].

DASARATHY, B .

IEEE TRANSACTIONS ON SOFTWARE ENGINEERING, 1985, 11 (01) :80-86

[6] THE OLYMPUS SYNTHESIS SYSTEM [J].

DEMICHELI, G ;

KU, D ;

MAILHOT, F ;

TRUONG, T .

IEEE DESIGN & TEST OF COMPUTERS, 1990, 7 (05) :37-53

[7]

GAJSKI DD, 1988, SILICON COMPILATION

[8]

GUPTA R, 1990, P INT C COMP AID DES, P216

[9]

Gupta R. K., 1992, Proceedings. The European Conference on Design Automation (Cat. No.92TH0414-3), P2, DOI 10.1109/EDAC.1992.205881

[10]

GUPTA RK, 1992, 1992 INT WORKSH HARD

← 1 2 3 →