300 KBIT BUBBLE MEMORY CHIP WITH PLANAR STRUCTURE

被引：18

作者：

ORIHARA, S

KINOSHITA, R

YANASE, T

SEGAWA, M

MATSUYAMA, S

YAMAGISHI, K

机构：

来源：

JOURNAL OF APPLIED PHYSICS | 1978年 / 49卷 / 03期

关键词：

D O I：

10.1063/1.324807

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

引用

页码：1930 / 1932

页数：3

共 11 条

[1]

ARCHER JL, 1977, INTERMAG C

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BONYHARD, PI ;

SMITH, JL .

IEEE TRANSACTIONS ON MAGNETICS, 1976, 12 (06) :614-617

[3]

BONYHARD PI, 1977, INTERMAG C

[4] GAP TOLERANT BUBBLE PROPAGATION CIRCUIT [J].

GERGIS, IS ;

GEORGE, PK ;

KOBAYASHI, T .

IEEE TRANSACTIONS ON MAGNETICS, 1976, 12 (06) :651-653

[5]

GERGIS IS, 1977, INTERMAG C

[6] LONG-TERM TESTING OF 68 KBIT BUBBLE DEVICE CHIPS [J].

HAGEDORN, FB .

IEEE TRANSACTIONS ON MAGNETICS, 1976, 12 (06) :680-682

[7]

MATSUYAMA S, 1977, INTERMAG C

[8]

NIELSEN JW, 1976, INTERMAG C

[9]

REEKSTIN JP, 1973, IEEE T MAGN, VMAG9, P485, DOI 10.1109/TMAG.1973.1067586

[10] PLANAR PROCESSING FOR MAGNETIC-BUBBLE DEVICES [J].

ROSE, DK .

IEEE TRANSACTIONS ON MAGNETICS, 1976, 12 (06) :618-621

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