A 1.0-NS 5-KBIT ECL RAM

被引:9
作者
CHUANG, CT
TANG, DD
LI, GP
HACKBARTH, E
BOEDEKER, RR
机构
关键词
D O I
10.1109/JSSC.1986.1052593
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:670 / 674
页数:5
相关论文
共 13 条
[1]  
ARIMURA M, 1986, ISSCC, P254
[2]   A SCHOTTKY-BARRIER DIODE WITH SELF-ALIGNED FLOATING GUARD RING [J].
CHUANG, CT ;
ARIENZO, M ;
TANG, DDL ;
ISAAC, RD .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1984, 31 (10) :1482-1486
[3]   FAST 7.5-NS ACCESS 1K-BIT RAM FOR CACHE-MEMORY SYSTEMS [J].
KAWARADA, K ;
SUZUKI, M ;
MUKAI, H ;
TOYODA, K ;
KONDO, Y .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1978, 13 (05) :656-663
[4]  
MIYANAGA H, 1984, INT C SOLID STATE DE, P225
[5]  
MIYANAGA H, 1984, S VLSI TECH, P50
[6]   SELF-ALIGNED BIPOLAR-TRANSISTORS FOR HIGH-PERFORMANCE AND LOW-POWER-DELAY VLSI [J].
NING, TH ;
ISAAC, RD ;
SOLOMON, PM ;
TANG, DDL ;
YU, HN ;
FETH, GC ;
WIEDMANN, SK .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1981, 28 (09) :1010-1013
[7]   A 4.5 NS ACCESS TIME 1KX4 BIT ECL RAM [J].
NOKUBO, J ;
TAMURA, T ;
NAKAMAE, M ;
SHIRAKI, H ;
IKUSHIMA, T ;
AKASHI, T ;
MAYUMI, H ;
KUBOTA, T ;
NAKAMURA, T .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1983, 18 (05) :515-520
[8]  
NOKUBO J, 1983, ISSCC, P112
[9]  
OOAMI K, 1983, ISSCC, P114
[10]  
SUGO Y, 1986, ISSCC, P256