BODY TIE PLACEMENT IN CMOS SOI DIGITAL CIRCUITS FOR TRANSIENT RADIATION ENVIRONMENTS

被引:14
作者
ALLES, ML [1 ]
KERNS, SE [1 ]
MASSENGILL, LW [1 ]
CLARK, JE [1 ]
JONES, KL [1 ]
LOWTHER, RE [1 ]
机构
[1] HARRIS SEMICOND INC,PALM BAY,FL
关键词
D O I
10.1109/23.124102
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This work presents criteria for the use of body ties to reduce or eliminate parasitic bipolar effects important in the transient radiation response of SOI/CMOS devices. A theoretically derived body tie spacing rule is verified using both TRIGSPICE and PISCESII with photocurrent injection capabilities. The tie spacing rule, which is independent of feature size within bounds, provides a simple guideline for design/layout of CMOS/SOI digital circuits for harsh transient radiation environments.
引用
收藏
页码:1259 / 1264
页数:6
相关论文
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