SIMULATION OF LARGE ON-CHIP CAPACITORS AND INDUCTORS

被引:4
作者
CUPPENS, R
DEMAN, HJ
SANSEN, WMC
机构
[1] Catholic University of Leuven
关键词
D O I
10.1109/JSSC.1979.1051212
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A circuit configuration to simulate large on-chip capacitors and inductors is discussed. It is based on the backward-Euler integration rule and can be realized by means of a sample-and-hold function. It leads to filters with time constants determined by resistor ratios and by the sample frequency. Copyright © 1979 by The Institute Of Electrical And Electronics Engineers, Inc.
引用
收藏
页码:543 / 547
页数:5
相关论文
共 5 条
[1]   SAMPLED ANALOG FILTERING USING SWITCHED CAPACITORS AS RESISTOR EQUIVALENTS [J].
CAVES, JT ;
COPELAND, MA ;
RAHIM, CF ;
ROSENBAUM, SD .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1977, 12 (06) :592-599
[2]  
CHUA LO, COMPUTER AIDED ANAL, pCH13
[3]   LOW INPUT CAPACITANCE VOLTAGE FOLLOWER IN A COMPATIBLE SILICON-GATE MOS-BIPOLAR TECHNOLOGY [J].
DEMAN, HJ ;
VANPARYS, RA ;
CUPPENS, R .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1977, 12 (03) :217-224
[4]   MOS SAMPLED DATA RECURSIVE FILTERS USING SWITCHED CAPACITOR INTEGRATORS [J].
HOSTICKA, BJ ;
BRODERSEN, RW ;
GRAY, PR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1977, 12 (06) :600-608
[5]  
TAN KS, 1978, 1978 DIG TECH PAP IS, P80