TIMING UNCERTAINTY FOR RECEIVERS IN OPTICAL CLOCK DISTRIBUTION FOR VLSI

被引：10

作者：

CLYMER, BD ^{[1
]}

GOODMAN, JW ^{[1
]}

机构：

[1] STANFORD UNIV, DEPT ELECT ENGN, INFORMAT SYST LAB, STANFORD, CA 94305 USA

来源：

OPTICAL ENGINEERING | 1988年 / 27卷 / 11期

关键词：

D O I：

10.1117/12.7976792

中图分类号：

O43 [光学];

学科分类号：

070207 ; 0803 ;

摘要：

引用

页码：944 / 954

页数：11

共 24 条

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[3] HOLOGRAPHIC OPTICAL INTERCONNECTS FOR VLSI [J].

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ESENER, SC ;

GUEST, CC ;

YU, P ;

DRABIK, TJ ;

FELDMAN, M ;

LEE, SH .

OPTICAL ENGINEERING, 1986, 25 (10) :1109-1118

[4]

Best R., 1984, PHASE LOCKED LOOPS

[5] OPTICAL CLOCK DISTRIBUTION TO SILICON CHIPS [J].

CLYMER, BD ;

GOODMAN, JW .

OPTICAL ENGINEERING, 1986, 25 (10) :1103-1108

[6]

CLYMER BD, 1987, THESIS STANFORD U

[7]

DHAR S, 1984, 1984 P IEEE C COMP D, P778

[8] DECISION AND CLOCK RECOVERY CIRCUITS FOR GIGAHERTZ OPTICAL FIBER RECEIVERS IN SILICON NMOS [J].

ENAM, SK ;

ABIDI, AA .

JOURNAL OF LIGHTWAVE TECHNOLOGY, 1987, 5 (03) :367-372

[9] OPTICAL I/O FOR HIGH-SPEED CMOS SYSTEMS [J].

FRIED, JA .

OPTICAL ENGINEERING, 1986, 25 (10) :1132-1141

[10]

Gardner F. M., 1979, PHASELOCK TECHNIQUES, V2nd

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